The present invention relates to a method of forming a self-aligned MESFET with T type gate by means of selective chemical vapor deposition of the tungsten (W) onto a silicon(Si) thin film.
The self-aligned MESFET is formed as a structure controlling the gap between the gate electrode and the n+ layer by using the T type multiple resists or the refractory metals. Such self-aligned MESFET has small parasitic resistance due to n surface depletion layer by forming n+ layer underneath a gate metal edge, and small parasitic gate capacitance by preventing transverse diffusion of n+ layer to the gate electrode.
As the representative self-aligned MESFET's, there are a SAINT(Self-Aligned Implantation of N+-layer Technology) and a SACSET(Sidewall-Assisted Closely-Spaces Electrode Technology) MESFET's.
The SAINT MESFET was complicated due to the process using T type multiple resists for forming the gate, and the process forming a gate being used practically thereto after removing the dummy gate. As well, the volitilization of the arsenic(As) has to be prevented there by specially forming a capping film in the activating process.
A SACSET MESFET is easy to suffer from damage of a substrate due to the reactive ion etching as the dry etching method when forming the gate electrode with an insulating layer in both side walls. Also, in the activating process, the mechanical and thermal stress occurred between the refractory metal electrodes and the insulation layers formed by both sidewalls, therefore has a bad effect upon devices.